Board Level IEEE 1149 . 1 Boundary Scan Built In Self Test
نویسنده
چکیده
IEEE1149.1 Boundary Scan has become an important test technique within complex IC's and boards in today's electronic assemblies, providing a low cost, high fault coverage test methodology for digital designs. The most common approach is for the IEEE1149.1 test to be performed in factory with test vectors being supplied by external test equipment, however new IEEE1149.1 test support devices are now becoming available that support enhanced IEEE1149.1 test solutions, by enabling system and field use of IEEE1149.1, while also embedding IEEE1149.1 test capability within a design. This paper shows how the IEEE1149.1 tests developed for factory test can be embedded and reused within a product, providing a high quality GO/NOGO built in self test (BIST) capability during the entire products life cycle. This embedded IEEE1149.1 BIST technique will be demonstrated by showing an implementation within a complex real life telecommunication product; it will take the readers through the basic hardware and software design requirements. STANDARD IEEE1149.1 TEST The Boundary-Scan tests prime function is to establish that all Jtag testable digital connections on an electronic assembly are free of faults, a typical test sequence would consist of five functions: “Infrastructure”, “Interconnect”, “Cluster”, “Device BIST”, “Device Programming”.
منابع مشابه
Synchronizing the IEEE 1149.1 Test Access Port for Chip-Level Testability
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